Residual stress prediction for microelectronic packaging materials
نویسندگان
چکیده
At cure temperatures below Tg the cure shrinkage contributes significantly to residual stress build-up. Residual stresses in a flip chip package The cure shrinkage model was implemented in FE code. In figures 2 and 3 the residual stress build-up for a 2D plane strain model of an adhesively bonded flip chip is shown. A schematic representation of the model is given in the inset of figure 3. For the sake of clarity the flip chip dimensions are somewhat exaggerated.
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